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june 2015 docid027593 rev 2 1 / 13 this is information on a product in full production. www.st.com STL90N6F7 n - channel 60 v, 0.0046 typ., 90 a stripfet? f7 power mosfet in a powerflat? 5x6 package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max i d STL90N6F7 60 v 0.0054 90 a ? among the lowest r ds(on) on the market ? excellent figure of merit (fom) ? low c rss /c iss ratio for emi immunity ? high avalanche ruggedness applications ? switching applications description this n - channel power mosfet utilizes stripfet? f7 technology with an enhanced trench gate structure that results in very low on - state resistance, while also reducing internal cap acitance and gate charge for faster and more efficient switching. table 1: device summary order code marking package packing STL90N6F7 90n6f7 powerflat tm 5x6 tape and reel 1 2 3 4 po werfl a t? 5x6
contents STL90N6F7 2 / 13 docid027593 rev 2 contents 1 electrical ratings ............................................................................. 3 2 electrical characteristics ................................................................ 4 2.1 electrical characteristics .................................................................... 5 3 test circuits ..................................................................................... 7 4 package information ....................................................................... 8 4.1 powerflat? 5x6 package information ........................................... 8 4.2 powerflat? 5x6 packing information ........................................... 10 5 revision history ............................................................................ 12
STL90N6F7 electrical ratings docid027593 rev 2 3 / 13 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage 60 v v gs gate - source voltag e 20 v i d (1) drain current (continuous) at t c = 25 c 90 a i d (1) drain current (continuous) at t c = 100 c 66 a i dm (1) (2) drain current (pulsed) 360 a i d (3) drain current (continuous) at t pcb = 25 c 21 a i d (3) drain current (continuous) at t pcb = 100 c 15 a i dm (2) (3) drain current (pulsed) 84 a p tot (1) total dissipation at t c = 25 c 94 w p tot (3) total dissipation at t pcb = 25 c 4.8 w t stg storage temperature - 55 to 175 c t j max. operating junction temperature 175 c notes: (1) this value is rated according to r thj -c (2) pulse width limited by safe operating area (3) this value is rated according to r thj -pcb table 3: thermal data symbol parameter value unit r thj - pc b (1) thermal resistance junction - pcb max. 31.3 c/w r thj -case thermal resistance junction - case max. 1.6 c/w notes: (1) when mounted on fr - 4 board of 1 inch2, 2oz cu, t < 10 sec
electrical characteristics STL90N6F7 4 / 13 docid027593 rev 2 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4: on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage i d = 1 ma, v gs = 0 v 60 v i dss zero gate voltage drain current v gs = 0 v v ds = 60 v 1 a i gss gate - body leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 4 v r ds(on) static drain - source on- resistance v gs = 10 v, i d = 10.5 a 0.0046 0.0054 table 5: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 25 v, f = 1 mhz, v gs = 0 v - 1600 - pf c oss output capacitance - 880 - pf c rss reverse transfer capacitance - 66 - pf q g total gate charge v dd = 30 v, i d = 21 a, v gs = 10 v - 25 - nc q gs gate - source charge - 7.2 - nc q gd gate - drain charge - 8.1 - nc table 6: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 30 v, i d = 10.5 a, r g = 4.7 , v gs = 10 v - 15 - ns t r rise time - 17.6 - ns t d(off) turn - off delay time - 24.4 - ns t f fall time - 7.8 - ns table 7: source - drain diode symbol parameter test conditions min. typ. max. unit v sd (1) forwa rd on voltage i sd = 21 a, v gs = 0 v - 1.2 v t rr reverse recovery time i d = 21 a, di/dt = 100 a/s v dd = 48 v - 39.6 ns q rr reverse recovery charge - 36 nc i rrm reverse recovery current - 1.8 a notes: (1) pulsed: pulse duration = 300 s, duty cycl e 1.5%
STL90N6F7 electrical characteristics docid027593 rev 2 5 / 13 2.1 electrical characteristics figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance
electrical characteristics STL90N6F7 6 / 13 docid027593 rev 2 figu re 8 : capacitance variations figure 9 : normalized gate threshold voltage vs temperature figure 10 : normalized on - resistance vs temperature figure 11 : normalized v(br)dss vs temperature figure 12 : source - drain diode forward characteristics
STL90N6F7 test circuits docid027593 rev 2 7 / 13 3 test circuits figure 13 : switching times test circuit for resistive load figure 14 : gate charge test circuit figure 15 : test circuit for inductive load switching and diode recovery times figure 16 : unclamped inductive load test circuit figure 17 : unclamped inductive waveform figure 18 : switching time waveform
package information STL90N6F7 8 / 13 docid027593 rev 2 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 4.1 powerflat? 5x6 package information figure 19 : powerflat? 5x6 type r package outline
STL90N6F7 package information docid027593 rev 2 9 / 13 table 8: powerflat? 5x6 type r mechanical data dim. mm min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 d 5.00 5.20 5.40 e 5.95 6.15 6.35 d2 4.11 4.31 e 1.27 l 0.60 0.80 k 1.275 1.575 e3 2.35 2.55 e4 0.40 0.60 e5 0.08 0.28 figure 20 : powerflat? 5x6 recommended footprint (dimensions are in mm)
package information STL90N6F7 10 / 13 docid027593 rev 2 4.2 powerflat? 5x6 packing information figure 21 : p owerflat? 5x6 tape outline (dimensions are in mm) figure 22 : powerflat? 5x6 package orientation in carrier tape measured from centerline of sprocket hole to centerline of pocket. cumulative tolerance of 10 sprocket holes is 0.20 . measured from centerline of sprocket hole to centerline of pocket. (i) (ii) (iii) 2 2.00.1 (i) bo (5.300.1) ko (1.200.1) 0.05) ?1.5 min. ?1.550.05 p ao(6.300.1) f(5.500.1)(iii) w(12.000.3) 1.750.1 4.00.1 (ii) p 0 y y section y-y c l p1(8.000.1) do d1 e 1 (0.30 t re f .r0.50 ref 0.20 base and bulk quantity 3000 pcs 8234350_ t ape_rev_c
STL90N6F7 package information docid027593 rev 2 11 / 13 figure 23 : powerflat? 5x6 reel outline
revision history STL90N6F7 12 / 13 docid027593 rev 2 5 revision history table 9: document revision history date revision changes 03- mar -2015 1 first release. 10- jun - 2015 2 in section 2 electrical characteristics: - updated table 5: dynamic - updated table 6: switching tim es - updated table 7: source - drain diode added section 2.1 electrical characteristics (curves)
STL90N6F7 docid027593 rev 2 13 / 13 important notice ? please read carefully stmicroelectronics nv and its sub sidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of order acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any war ranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any p rior versions of this document. ? 2015 stmicroelectronics ? all rights reserved

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